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Design Rule Verification Report

Date : 11/11/2009
Time : 11:42:21 PM
Elapsed Time : 00:00:02
Filename : C:\Documents and Settings\MauroS\Desktop\UAS\electronica\Xbee_board.PcbDoc
Warnings : 0
Rule Violations : 48

Summary

Warnings Count
Total 0

Rule Violations Count
SMD Neck-Down Constraint (Percent=50%) (All) 16
Width Constraint (Min=0.25mm) (Max=0.5mm) (Preferred=0.3mm) (All) 1
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) 0
Hole Size Constraint (Min=0.03mm) (Max=2.54mm) (All) 2
Hole To Hole Clearance (Gap=0.254mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All) 12
Net Antennae (Tolerance=0mm) (All) 0
Width Constraint (Min=0.25mm) (Max=0.8mm) (Preferred=0.5mm) ((InNet('GND') AND InNet('V+'))) 0
Clearance Constraint (Gap=0.25mm) (All),(All) 14
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) 0
Room Xbee_board (Bounding Region = (47.371mm, 76.327mm, 90.805mm, 141.351mm) (InComponentClass('Xbee_board')) 3
Total 48

SMD Neck-Down Constraint (Percent=50%) (All)
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
SMD Neck-Down Constraint Between Pad on TopLayer And Track on TopLayer
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Width Constraint (Min=0.25mm) (Max=0.5mm) (Preferred=0.3mm) (All)
Width Constraint: Track (56.15828mm,97.32589mm)(56.17037mm,97.33798mm) Top Layer
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Hole Size Constraint (Min=0.03mm) (Max=2.54mm) (All)
Hole Size Constraint: Pad rs232-10(78.53502mm,85.70001mm) Multi-Layer
Hole Size Constraint: Pad rs232-11(53.54498mm,85.70001mm) Multi-Layer
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Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
Pad C1-1(53.467mm,100.18801mm) Top Layer Pad C1-2(53.467mm,101.48799mm) Top Layer
Pad C4-2(53.83301mm,96.266mm) Top Layer Pad C2-2(54.864mm,97.39401mm) Top Layer
Pad C4-1(55.13299mm,96.266mm) Top Layer Pad C2-2(54.864mm,97.39401mm) Top Layer
Pad C2-1(54.864mm,98.69399mm) Top Layer Pad C2-2(54.864mm,97.39401mm) Top Layer
Pad C3-1(59.563mm,92.34399mm) Top Layer Pad C3-2(59.563mm,91.04401mm) Top Layer
Pad C4-1(55.13299mm,96.266mm) Top Layer Pad C4-2(53.83301mm,96.266mm) Top Layer
Pad Cbypass-1(68.05701mm,99.822mm) Top Layer Pad Cbypass-2(69.35699mm,99.822mm) Top Layer
Via (61.9506mm,96.5454mm) Top Layer to Bottom Layer Pad Free-0(62.484mm,94.742mm) Multi-Layer
Pad USB A-2(83.328mm,93.74602mm) Multi-Layer Pad USB A-3(85.328mm,93.74602mm) Multi-Layer
Pad USB A-1(83.328mm,96.24598mm) Multi-Layer Pad USB A-4(85.328mm,96.24598mm) Multi-Layer
Pad C - Vcc-2(70.104mm,92.72199mm) Multi-Layer Pad C - Vcc-1(70.104mm,94.22201mm) Multi-Layer
Pad C - V+-2(84.328mm,80.50601mm) Multi-Layer Pad C - V+-1(84.328mm,79.00599mm) Multi-Layer
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Clearance Constraint (Gap=0.25mm) (All),(All)
Pad uC2-2(58.09498mm,99.93798mm) Top Layer Pad uC2-1(58.09498mm,100.58801mm) Top Layer
Pad uC2-3(58.09498mm,99.28799mm) Top Layer Pad uC2-2(58.09498mm,99.93798mm) Top Layer
Pad uC2-4(58.09498mm,98.638mm) Top Layer Pad uC2-3(58.09498mm,99.28799mm) Top Layer
Pad uC2-5(58.09498mm,97.98802mm) Top Layer Pad uC2-4(58.09498mm,98.638mm) Top Layer
Pad uC2-6(58.09498mm,97.33798mm) Top Layer Pad uC2-5(58.09498mm,97.98802mm) Top Layer
Pad uC2-7(58.09498mm,96.688mm) Top Layer Pad uC2-6(58.09498mm,97.33798mm) Top Layer
Pad uC2-8(58.09498mm,96.03801mm) Top Layer Pad uC2-7(58.09498mm,96.688mm) Top Layer
Pad uC2-18(65.09502mm,99.28799mm) Top Layer Pad uC2-19(65.09502mm,99.93798mm) Top Layer
Pad uC2-17(65.09502mm,98.638mm) Top Layer Pad uC2-18(65.09502mm,99.28799mm) Top Layer
Pad uC2-16(65.09502mm,97.98802mm) Top Layer Pad uC2-17(65.09502mm,98.638mm) Top Layer
Pad uC2-15(65.09502mm,97.33798mm) Top Layer Pad uC2-16(65.09502mm,97.98802mm) Top Layer
Pad uC2-14(65.09502mm,96.688mm) Top Layer Pad uC2-15(65.09502mm,97.33798mm) Top Layer
Pad uC2-13(65.09502mm,96.03801mm) Top Layer Pad uC2-14(65.09502mm,96.688mm) Top Layer
Pad uC2-12(65.09502mm,95.38802mm) Top Layer Pad uC2-13(65.09502mm,96.03801mm) Top Layer
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Room Xbee_board (Bounding Region = (47.371mm, 76.327mm, 90.805mm, 141.351mm) (InComponentClass('Xbee_board'))
Room Definition Between Component on TopLayer And Rule on TopLayer
Room Definition Between Component on TopLayer And Rule on TopLayer
Room Definition Between Component on TopLayer And Rule on TopLayer
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